The present invention relates to a semiconductor device, a method for evaluating wirings and a device for evaluating wirings which are effective for evaluating resistance to electromigration.
Recently, in an important section of a computer or a communication device, large scale integrated circuits (LSI), in which many transistors, resistors and the like are connected to form an electric circuit and integrated on one chip, have been very frequently used. Thus, the performance of such a device, as a whole, is very relevant to the performance of LSI per se. The performance of LSI per se can be improved by heightening an integration degree, that is, by making the element minute or fine.
As the element is made finer, its wirings are also made finer. For LSI, high-speed operation is also required, as well as high integration, whereby the electric current flowing into wirings tends to increase. By making the element finer and due to an increase in the electric current as described above, the electric current flowing through a unit area of a wiring, that is, the current density is increasingly raised.
When the current density is raised, metal atoms constituting a wiring are moved in the direction opposite to the current-flow direction, so that a part of the wiring is gradually made narrow. Eventually, the part may snap off. Such a phenomenon is called electromigration (EM), and is an important factor influencing reliability of a wiring. Therefore, for LSI where the integration degree is heightened, the method for evaluating resistance to EM is an important technique.
As one of the methods for evaluating resistance to EM, there is a known method of increasing in the resistance of a wiring. FIG. 1 illustrates the evaluating system. This is a system for evaluating resistance to EM of a wiring including a contact hole or a via hole.
In FIG. 1, reference number 81 represents the first insulator film. On the first insulator film 81, the first testing wiring 82 is deposited. The first testing wiring 82 is covered with the second insulator film 83. A connecting hole reaching the first testing wiring 82 is formed through the second insulator film 83. The first testing wiring 82 is connected to the second testing wiring 85 through a connecting plug 84 formed inside this connecting hole. The first testing wiring 82 corresponds to a diffused layer (in the case where the connecting hole is a contact hole) or a lower wiring (in the case where the connecting hole is a via hole) in an actual device.
When an electric current I is sent from one end of the second testing wiring 85, the end being at the side away from the connecting plug 84, to the first testing wiring, voids produced in the vicinity of the other end of the second testing wiring 85 grow toward the end at the side away from the connected plug 84. As the voids grow more and more, the resistance rises.
The resistance is calculated from the potential difference between the voltage V1 at the first wiring 82 under the connecting plug 84 and the voltage V2 at the one end of the second wiring 85. This potential difference is measured with a voltmeter (not shown).
The resistance when the current I starts to be sent, and the resistance when the time t passes from the time at which the current I starts to be sent are referred to as R0 and Rt, respectively. A resistance rise rate is represented by (Rt/R0).multidot.100[%]. The time t when the resistance rise rate reaches a specified value (for example, 10[%]) is defined as a wiring life span. Resistance to EM is evaluated by the wiring life span.
However, this sort of method for evaluating resistance to EM has the following problems. That is, the longer the second testing wiring 85 is, the larger the volume of voids is if the rate of resistance increase is the same. Therefore, as the second testing wiring 85 is longer, the wiring life span seems longer. Thus, the wiring life span cannot be evaluated accurately.
In order to accurately evaluate the wiring life span, it is necessary to obtain the volume of voids by calculation from the evaluation result. However, an actual device has wirings having various lengths; thus, design for the device becomes complicated if calculation for all of these wirings is conducted. Such a method is not practical.
On the other hand, if the wiring life span is defined by using the void volume itself, the problem occur that the wiring life span seems longer as the second test wiring 85 is longer does not occur.
However, in order to obtain the void volume, an undesired analysis (destructive test) such as an SEM (scanning electron microscope) analysis becomes necessary. This analysis takes much time, and is not effective.